Szukana fraza: [Abstract = "Simulation results are presented that illustrate the performance of the effect of the time delay introduced into the adaptation algorithm. The proposed architectures for efficient pipelining of the FD LMS linear equalization algorithm are suitable for implementation on special purpose hardware by means of the ASIC, ASIP or FPGA VLSI processors."]
Wyników: 1
AMCS, Volume 16 (2006)
Glentis, George-Othon Georgoulakis, Kristina Korbicz, Józef - red. Uciński, Dariusz - red.
2006
artykuł