Loop profiling tool for HPC code inspection as an efficient method of FPGA based acceleration - Pietroń, Marcin; Russek, Paweł; Wiatr, Kazimierz (Zielona Góra: Uniwersytet Zielonogórski)
This paper presents research on FPGA based acceleration of HPC applications. The most important goal is to extract a code that can be sped up. A major drawback is the lack of a tool which could do it. HPC applications usually consist of a huge amount of a complex source code. This is one of the reasons why the process of acceleration should be as automated as possible. Another reason is to make use of HLLs (High Level Languages) such as Mitrion-C (Mohl, 2006).
Keywords: HPC; HPRC (High Performance Reconfigurable Computing); loop profiling; Mitrion-C; DFG (Data Flow Graph)