Synthesis of finite state machines for programmable devices based on multi-level implementation - Bukowiec, Arkadiusz
New architectures of FPGA devices combine different type of logic elements like look-up tables, flip-flops and memory blocks. But standard synthesis methods utilize only look-up tables and flip-flops and it makes that device utilization is not optimal one.
Keywords: jednostka sterująca; FPGA; dekompozycja blokowa; skończony automat stanów; synteza strukturalna; układ reprogramowalny