@misc{Bukowiec_Arkadiusz_Synthesis,
 author={Bukowiec, Arkadiusz},
 howpublished={online},
 language={eng},
 abstract={New architectures of FPGA devices combine different type of logic elements like look-up tables, flip-flops and memory blocks. But standard synthesis methods utilize only look-up tables and flip-flops and it makes that device utilization is not optimal one.},
 abstract={Methods of synthesis and implementation of Mealy finite state machines into Field Programmable Devices there are presented in this work. Proposed methods of synthesis are dedicated into developed multi-level structures of digital circuits of finite state machines. Architectures of designed structures are based on existence of decoders as second-level circuits. Methods of synthesis are based on the multiple encoding. There is also proposed hardware implementation into an FPGA device of developed multi-level structures. The hardware implementation is based on an implementation with use of look-up tables and memory blocks together. It leads to better utilization of a device that standard methods gives.},
 abstract={Proposed methods have been implemented by academic software for logic synthesis of automata. Conducted experiments shown that these methods are effective for FPGA devices.},
 title={Synthesis of finite state machines for programmable devices based on multi-level implementation},
 type={rozprawa doktorska},
 keywords={jednostka sterująca, FPGA, dekompozycja blokowa, skończony automat stanów, synteza strukturalna, układ reprogramowalny},
}